Introduction

About Me

Hello! ☺️ I'm Hyunsung Jeong, an undergraduate researcher at UNIST 🎓, working under the wonderful advising of Professor Jongeun Lee at the ICCL Lab 🔬. I explore how smart abstractions can make hardware systems—from stateful circuits to DNN accelerators—easier to search, validate, and bring to life ⚙️

🎓 Bachelor of Engineering in Electrical and Electronic Engineering · GPA 4.22 / 4.30 (Major 4.30 / 4.30)

Updates

Recent News

  • I'll be heading to DAC 2026 to present B-Flex in person.(reflection)Jul. 2026

  • My paper B-Flex got accepted to DAC 2026 — grateful for the wonderful collaboration with Kyounghun Kang.Mar. 2026

  • I'm grateful to have received the Unhae Scholarship (KRW 8,000,000) this year.Feb. 2026

  • I was named to the Dean's List, College of Engineering.Aug. 2025

  • Wrapped up 21 months of service in the Republic of Korea Air Force — proud to have helped protect my country.Jan. 2025

  • Named to the Dean's List, College of Engineering, in my sophomore year.Feb. 2023

Research

Research

Undergraduate Researcher, ICCL Lab, UNIST — advised by Prof. Jongeun Lee. Aug. 2025 – Present.

ApplicationAlgorithmSystemArchitectureMicroarchLogicCircuitPhysical

B-Flex

Aug. 2025 – Nov. 2025

SoDA

2025 – 2026

From DSE Abstractions to Synthesizable Hardware Designs

2026

2026DAC 2026

B-Flex: Exploration of Broader Flip-Flop Design Space Based on FSM Exhaustive Search

Hyunsung Jeong*, Kyounghun Kang*, Jongeun Lee, and Wanyeong Jung (*Equal contribution)

Proc. Design Automation Conf. (DAC) · Acceptance rate 22.3%

Addressed the limited scalability of prior flip-flop exploration methods, which were constrained by incomplete validation and inefficient brute-force FSM search.

Logic-Level ValidationFSM SearchFlip-Flop DesignFormal Methods
Manuscript in Preparation

SoDA: Schema-Driven Co-Exploration of Hardware and Mapping for DNN Accelerators

Cooking something up — full details soon 🍳

In Progress

From DSE Abstractions to Synthesizable Hardware Designs

Cooking something up — full details soon 🍳

Coursework

Selected Projects

Selected Coursework

Advanced Computer Architecture, Tensor Processor Design, Computer Architecture, VLSI Design, Digital Logic Design and Lab, Electronic Circuits I/II and Lab, Semiconductor Engineering, Automatic Control

Recognition

Honors & Awards

  • Unhae Scholarship

    Grant

    Merit-based scholarship, KRW 8,000,000, approximately USD 5,500.

  • Dean's List Award, College of Engineering

    Prize

    Awarded to the top-ranked student in the Department of Electrical and Electronic Engineering.

  • New Student Division Award for Academic Excellence

    Prize

    Awarded to one of the top three first-year students across UNIST.

  • UNIST Full-Tuition Scholarship

    Grant

    Received university-funded tuition support for all eight undergraduate semesters.

Toolkit

Technical Skills

Languages
C++, Python, Verilog HDL, Chisel/Scala (basic)
Hardware
Xilinx Vitis HLS, Xilinx Vivado Design Suite, Timeloop
Parallel Programming
CUDA, OpenMP